MCS-012-SOLVED ASSIGNMENT 2016-2017, IGNOU BCA 2nd SEM.

1. (Covers Block 1)

(a) How can you represent a negative integer in a computer system?

If 8 bits (including one sign bit) are to be used to represent

integers in binary 2‟s complement notation, then what are the

possible minimum and maximum number that can be

represented? Perform the following arithmetic operations using

signed 2‟s complement, 8 bit representation. (Please note that the

numbers given below are in decimal notation)

i) Subtract 198 from –98

ii) Add 124 and 142

Please indicate the overflow if it is occurs. How have you

identified the overflow?

(b) Perform the following conversion of numbers:

(i) Decimal (2050)10 to hexadecimal

(ii) Hexadecimal (19BACDFE)H into Octal.

(iii) ASCII string "AssignMenT" into UTF 16

(iv) Octal (547561)O into Hexadecimal

(c) A combinational circuit is to be designed that counts the number

of occurrences of 1 bits in a 4 bit input, however, an input 1111 is

an invalid input for the circuit and output in such a case will be 00.

One valid input for such circuit may be 1110 having the output 11;

another valid input may be 1010 with the output 10. Draw the

truth table for the circuit. Use the Karnaugh's map to design the

circuit and draw it using AND, OR and NOT gates.

(d) What is parity bit? Explain how Single Error Correcting (SEC)

code uses parity bits. If an 8 bit data 10101010 on transmission is

received as 10111010, then how the SEC code will detect and

correct this error.

(e) Design a two bit counter (a sequential circuit) that counts in

reverse order, i.e. from 11 to 00. Thus, the counter states are 11,

10, 01, 00, 11, 10, 01, 00, 11 …

You should show the state table, state diagram, the k-map for

circuit design and logic diagram of the resultant design using D

flip-flop or J-K flip flop.

(f) Explain the single precision floating point IEEE 754

representation. Give the number ranges that can be represented by

this representation. Also, represent the number (356.122)10 using

IEEE 754 single precision as well as double precision

representations. Is the representation of the said number exactly

same in the two representations? Explain your answer.

2. (Covers Block 2)

(a) How is the word size of RAM and its capacity related to number

of addressing bits? A RAM has a capacity of 1M words having

the word size of 32 bits and supports byte addressing.

(i) How many data input and output lines does this RAM need?

Explain your answer.

(ii) How many address lines will be needed for this RAM?

(b) A hypothetical computer has 16 MB RAM and has a word size of

32 bits. It has cache memory having 32 blocks having a block size

of 64 bits. Show how the main memory address

100110001111101110111100 will be mapped to a cache address,

if

(i) Direct cache mapping is used

(ii) Associative cache mapping is used

(iii) Two way set associative cache mapping is used.

(c) Explain the basic features of the three I/O techniques

(Programmed I/O, Interrupt driven I/O and DMA) with the help of

diagrams. A computer is to be designed for an environment

requiring frequent disk transfers. Which of the three I/O

techniques is most suitable for this computer? Justify your answer.

(d) Consider a file having name mca.txt and is of size 20 K. You have

a disk having 32 tracks, each track having 16 sectors with each

sector being 1K. Assume that disk has three free - continuous

clusters of 8 sectors each. How can this file be given the space on

the disk? Show the content of FAT after the space allocation to the

file. You may make suitable assumptions. You may assume the

cluster size as 4 sectors.

(e) Explain the following giving their uses and

advantages/disadvantages.

(Word limit for answer of each part is 50 words ONLY)

(i) DVD

(ii) Monitor Resolution

(iii) Non-impact printers

(iv) Scan codes

(v) Graphics accelerators

(vi) SCSI

3. (Covers Block 3)

(a) A hypothetical machine has 64 general purpose registers of 64 bits

each. The machine has 4G word of RAM (assume that each word

is of 64 bits and memory is word addressable). The instructions of

machine are of fixed format and are 64 bit long. Instructions of the

machine consist of operation code, addressing mode specification,

one register operand and one memory operand. The machine uses

2 bits to specify addressing mode as given below:

​Machine can specify 1024 different operation codes. Assume that

the machine has named 5 of its general purpose registers based on

their possible role in instruction execution as Program Counter

(PC), Accumulator (AC), Memory Address Register (MAR),

Instruction Register (IR) , Data Register (DR) and Flag registers

(FR). Perform the following tasks for the machine.

(i) Specify the size of different fields that are needed in the

instruction. (You may leave some bits as unused).

(ii) Put some valid values in certain registers and memory

locations and demonstrate examples of different addressing

modes of this machine.

(iii) Assuming that the instructions are first fetched to Instruction

Register (IR) and the two operands are transferred to AC and

DR registers respectively, and result of operation is stored in

the AC register; write and explain the sequence of microoperations

that are required for fetch and execute cycles of an

ADD instruction having addressing mode bits as 01. Make

and state suitable assumptions, if any.

(b) Assume that you have a machine as shown in section 3.2.2 of

Block 3 having the micro-operations as given in Figure 10 on page

62 of Block 3. Consider that R1 and R2 both are 8 bit registers and

contains 11010011 and 10000111 respectively. What will be the

values of select inputs, carry-in input and result of operation

(including carry out bit) if the following micro-operations are

performed? (For each micro-operation you may assume the initial

value of R1 and R2 as given above)

(i) Subtract with borrow R2 from R1

(ii) Exclusive OR of R1 and R2

(iii) Shift left R1 twice

(iv) Increment R1

(c) What are the functions of a control unit? Compare and contrast

the functioning of hardwired control unit to that of microprogrammed

control Unit.

(d) Explain the differences between the RISC and CISC machines.

Also explain the differences in the pipelining of these two types of

machines.

(e) Assume that a RISC machine has 256 registers out of which 48

registers are reserved for the Global variables and 64 for

Instruction related tasks. This machine has been designed to have

16 registers for storing four input parameters, four output

parameters and eight local variables for function call. Explain with

the help of a diagram, how the overlapped register window can be

implemented in this machine for a function/procedure calls. You

must explain how the parameters will be passed when a function

calls another function.

4. (Covers Block 4)

(a) Write a program in 8086 assembly Language (with proper

comments) that accepts a string of four characters entered using

the keyboard and checks if all the entered characters are decimal

digits. In case all the characters are decimal digits then it converts

the entered string into equivalent binary number. Make suitable

assumptions, if any.

(b) Write a program in 8086 assembly Language (with proper

comments) that passes a parameter containing a lower case

alphabet to a near procedure named TOUPCASE, which converts

it to upper case and returns it to the calling assembly program.

Make suitable assumptions, if any.

(c) Explain the following in the context of 8086 Microprocessor

(i) Use of segment and segment registers

(ii) Interrupt vector table and its use

(iii) Indirect Addressing Modes of 8086 microprocessor.

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